Thesis Defense: Designing Fast and Programmable Routers

Speaker: Anirudh Sivaraman, Ph.D. Candidate , CSAIL, EECS/MIT

Date: Thursday, June 22, 2017

Time: 2:00 PM to 3:00 PM Note: all times are in the Eastern Time Zone

Refreshments: 1:45 PM

Public: Yes

Location: Patil/Kiva (32-G449)

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Host: Hari Balakrishnan and Mohammad Alizadeh, CSAIL, EECS/MIT

Contact: Sheila M. Marian, 617-253-1996,

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Reminder Subject: TALK: Thesis Defense: Designing Fast and Programmable Routers

Abstract: Historically, the evolution of network routers was driven primarily by performance. Recently, owing to the need for better control over network operations and the constant demand for new features, programmability of routers has become as important as performance. However, today’s fastest routers, which run at line rate, use fixed-function hardware, which cannot be modified after deployment. This talk will describe three router primitives we have developed to
build programmable routers at line rate.

The first is a programmable packet scheduler. The second is a way to program stateful packet-processing algorithms to manage network resources. The third is a design to measure programmer-defined statistics, such as counters and moving average filters, on a per-flow basis, while supporting a large number of flows. Together, these primitives allow us to program several packet-processing functions at line rate for the first time, such as in-network congestion control,
active queue management, data-plane load balancing, network measurement, and packet scheduling.

Thesis Committee: Hari Balakrishnan (CSAIL, MIT), Mohammad Alizadeh (CSAIL, MIT), George Varghese (UCLA), Nick McKeown (Stanford)

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Created by Sheila M. Marian Email at Monday, June 19, 2017 at 7:50 AM.