Accelerator-level Parallelism: Mobile SoCs as Harbinger of the Future
Mark D. Hill
, University of Wisconsin-Madison
Date: Monday, May 20, 2019
Time: 2:00 PM to 3:00 PM
Event Type: Seminar
Host: Professor Arvind, CSG - CSAIL - MIT
Contact: Sally O. Lee, 3-6837, firstname.lastname@example.org
Speaker URL: None
TALK: Accelerator-level Parallelism: Mobile SoCs as Harbinger of the Future
This talk will first discuss how computer systems are transitioning from homogeneous parallelism to heterogeneity: ILP, TLP, and new Accelerator-level Parallelism (ALP). It will then discuss systems on a chip (SoCs) for mobile computing, and why they may be a harbinger of computer systems’s ALP future. It will conclude presenting the Gables model largely developed at Google’s Mobile Silicon Group for HPCA 2019’s Industrial Session. Gables seeks to make SoC selection and design more scientific via extending Roofline and bottleneck analysis to provide the first answers, not the final answers. This is joint work with Vijay Janapa Reddi at Harvard.
Mark D. Hill (http://www.cs.wisc.edu/~markhill) is John P. Morgridge Professor and Gene M. Amdahl Professor of Computer Sciences at the University of Wisconsin-Madison, where he also has a courtesy appointment in Electrical and Computer Engineering. His research interests include parallel-computer system design, memory system design, and computer simulation. He is a fellow of IEEE and the ACM. He serves as Chair of the Computer Community Consortium (2018-19) and served as Wisconsin Computer Sciences Department Chair 2014-2017. Hill has a PhD in computer science from the University of California, Berkeley.
**refreshments at 1:45 pm
Systems & Networking
Created by Sally O. Lee at Friday, April 05, 2019 at 1:30 PM.