Thesis defense: Constructing and Evaluating Weak Memory Models

Speaker: Sizhuo Zhang , CSG - CSAIL - MIT

Date: Monday, May 13, 2019

Time: 3:30 PM to 5:00 PM

Public: Yes

Location: 32-D507

Event Type: Thesis Defense

Room Description:

Host: Professor Arvind, CSG - CSAIL - MIT

Contact: Sally O. Lee, 3-6837, sally@csail.mit.edu

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Speaker URL: None

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Reminders to: seminars@csail.mit.edu

Reminder Subject: TALK: Thesis defense: Constructing and Evaluating Weak Memory Models

Abstract:

A memory model for an ISA specifies all the legal multithreaded-program behaviors, and consequently, imposes constraints on processor implementations. Weak memory models are a consequence of the desire on part of architects to preserve all the implementation flexibility provided by uniprocessors optimizations, while building a shared memory multiprocessor. Commercial weak memory models like ARM and POWER turn out to be extremely complicated: it has taken over a decade to formalize their definitions. These formalization efforts are mostly empirical -- they try to capture empirically observed behaviors -- and end up providing no insight into the inherent nature of weak memory models.

This thesis takes a constructive approach to study weak memory models. We first constructed a common base for weak memory models to better understand the nature and the complexity of weak memory models.

After identifying the source of complexity of the common base model, we constructed a different weak memory model which has a much simpler definition but almost the same performance as other weak memory models.

To evaluate the performance/power/area (PPA) of weak memory models versus that of strong memory models like TSO, we developed an out-of-order superscalar cache-coherent multiprocessor. The evaluation shows that the PPA of an optimized TSO implementation can match that of implementations of weak memory models. In particular, for some multithreaded programs that perform frequent synchronizations, TSO can even have better performance than weak memory models, because the abundant fences in the program serialize the execution in weak memory models. Since the complexity of weak memory models does not result in improvement of PPA, it may be time to rethink if it is worthwhile to have any weak memory models.

Research Areas:
Systems & Networking

Impact Areas:

This event is not part of a series.

Created by Sally O. Lee Email at Wednesday, May 08, 2019 at 10:58 AM.